Digital Logic Design Using Verilog (Coding and Rtl Synthesis)

저자
Taraate, Vaibbhav
출판사
Springer Verlag
출판일
20160521
ISBN
9788132227892

소개

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design.